class ov::pass::DivisionByZeroFP16Resolver¶
Overview¶
: clamps eps into fp16 minimal normalized value in input_1/Maximum(input_2, eps); input_1/Add(input_2, eps); and input_1*Pow(Maximum[Add](input_2, eps), -z) patterns to prevent division by zero. More…
#include <division_by_zero_fp16_resolver.hpp>
class DivisionByZeroFP16Resolver: public ov::pass::MatcherPass
{
public:
// methods
OPENVINO_RTTI("DivisionByZeroFP16Resolver", "0");
};
Inherited Members¶
public:
// typedefs
typedef DiscreteTypeInfo type_info_t;
// methods
bool get_property(const PassPropertyMask& prop_mask) const;
void set_name(const std::string& name);
std::string get_name() const;
void set_callback(const param_callback& callback);
virtual void set_pass_config(const std::shared_ptr<PassConfig>& pass_config);
std::shared_ptr<PassConfig> get_pass_config();
bool m_transformation_callback(const std::shared_ptr<const Node>& node);
bool transformation_callback(const std::shared_ptr<const Node>& node);
virtual const type_info_t& get_type_info() const = 0;
OPENVINO_RTTI("ov::pass::MatcherPass");
MatcherPass& operator = (const MatcherPass&);
bool apply(std::shared_ptr<ov::Node> node);
template <typename T, class... Args>
std::shared_ptr<T> register_new_node(Args&&... args);
template <typename T>
std::shared_ptr<T> register_new_node(const std::shared_ptr<T>& node);
std::shared_ptr<ov::Node> register_new_node_(const std::shared_ptr<ov::Node>& node);
const std::vector<std::shared_ptr<ov::Node>>& get_new_nodes();
void clear_new_nodes();
std::shared_ptr<pattern::Matcher> get_matcher();
Detailed Documentation¶
: clamps eps into fp16 minimal normalized value in input_1/Maximum(input_2, eps); input_1/Add(input_2, eps); and input_1*Pow(Maximum[Add](input_2, eps), -z) patterns to prevent division by zero.
eps must be always nonzero to prevent from NaNs in such expressions if input_1 and input_2 simultaneously happened to be zero. We should keep in such patterns eps >= fp16 minimal normalized value so that CompressFloatConstants should not cast them into zero during compression into f16.